Evaluation of Hysteresis and Charge Trapping in GaN on Si HEMTs Using Triangular Gate Voltage Pulses

Abstract

We report a study of GaN-on-Si enhancement-mode HEMTs operated in switching mode with resistive loads under triangular 0-5 V gate voltage pulses (μs to ms range duration). Hysteresis in the drain current ID vs. gate voltage VGS between the rising and falling edges is analyzed for single pulses of varying duration and multiple pulses of varying count, and compared to dynamic steady-state operation after up to 30 min. This reveals how short-term trapping dynamics affects threshold gate voltage (VTH) shifts. Results show that hysteresis increases with repeated pulses due to trapped charge accumulation, while for prolonged switching operation hysteresis vanishes because a trapping/release dynamic equilibrium is reached. Measured VTH shifts and dynamic RON after a 30 min OFF-state DC stress (VDS = 55 V, floating gate) test highlights an appreciable performance degradation.