Time Domain Investigation of Dynamic ON-Resistance and Trapping Effects in GaN-on-Si HEMTs under Rectangular Gate Voltage Pulses

Abstract

We present experimental results of GaN-on-Si enhancement-mode HEMTs operated in switching mode with resistive load, using rectangular 0-5 V gate voltage (VGS) pulses, focusing on the investigation of charge carriers trapping and their effects on dynamic ON-resistance (RON). Single pulse transient measurements indicate that current collapse related to trapping effects are more evident for a low drain current (ID) of 100mA, while they are strongly reduced for ID=750mA where release is more effective. Studying the device behaviour with multiple VGS pulses reveals a decrease in RON with pulse number with a steady state reached after 100 ms, also confirmed by measurement with a square wave VGS at much longer times up to 30 min. Longer single pulses of 30 min duration allow us to measure the DC RON that is at least a factor of ten smaller than the one for short single and multiple pulses, demonstrating that current collapse vanishes at longer times. Additionally, an OFF-state stress test at VDS=55 V reveal the presence and impact of surface/interface traps in the drain access region, leading to an increase of 4 times in RON in respect to pristine devices.